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Reliability Data - HTRB Life  
Central Semiconductor performs extensive reliability stress testing on a variety of products from our product portfolio. This data is collected
in addition to our standard qualification test data for any new or changed product. Data noted herein is based on standard FIT rate calculations
as detailed below:
Product Type Package Type Failure Rate (FITS) (1)
Transistor SOT-23 2.15
SOT-323, SOT-523, SOT-563, SOT-923, SOT-953 2.30
SOIC-8, SOT-26, SOT-363, SOT-883L 2.52
SOT-223 3.48
SOT-89 3.78
 
Bipolar Power Transistors DPAK 4.22
 
Switching Diodes SOD-123, SOT-23 2.15
SOD-323, SOD-523, SOD-923, SOT-323, SOT-523, SOT-563 2.30
SOT-363 2.52
SOD-80 2.89
 
Fast, Ultra, Super and HyperFast  Rectifiers SOD-123F 2.15
MELF 2.89
SMA, SMAFL, TLM364 3.48
SMB, SMBFL, SMC 3.78
DPAK 4.22
D2PAK 5.68
 
Zener Diodes SOD-123, SOT-23 2.15
SOD-323, SOD-523, SOD-923, SOT-563 2.30
SOT-363 2.52
SOD-80, MELF 2.89
SMA, TLM2D3D6 3.48
 
Schottky Diodes & Rectifiers SOD-123, SOD-123F, SOT-23 2.15
SOD-323, SOD-323FL, SOD-523, SOD-923, SOT-523, SOT-563, SOT-963, SOD-882L, SOT-23F 2.30
SOT-363 2.52
MELF 2.89
SMA, SMAFL, TLM364, TLM621, TLM2D3D6 3.48
SMB, SMBFL, SMC, TLM621H, TLM322, TLM832, TLM832D 3.78
DPAK, TLM833S 4.22
D2PAK 5.67
 
General Purpose Diodes SOD-123F, SOT-23 2.15
SOT-563 2.30
MELF, SOT-143 2.89
SMA, TLM364 3.48
SMB, SMC 3.78
 
Current Limitng Diodes SOD-123FL 2.30
     
Bridge Rectifiers HDDIP, LPDIP, SMDIP 3.48
 
MOSFETs SOT-23 2.15
SOT-523, SOT-563, SOT-923, SOT-953, SOT-963 2.30
SOT-363, SOT-883L 2.52
TLM621H, TLM3D6D8 3.78
 
TVS SOD-123F 2.15
SOT-363 2.52
SMA, SMAFL 3.48
SMB, SMC 3.78
 
Thyristor TLM-532 3.48
   
 
(1) 60% Confidence Level. Accelerated testing.

 

Formulas
  The failure rate calculation based on a single life test is as follows:
 

Fig1
λ = Failure Rate

TDH = Total Device Hours

AF= Acceleration Factor

 

 

The Accelleration Factor is calculated as follows:

 

Fig3

Ea = Thermal Activation Energy

k =Boltzmann's Constant (8.63 x 10-5 eV/K

Tuse= Use Temperature (°C + 273)

Tstress = Life test stress temperature (°C + 273)

 

 

 

The comprehensive failure rate is calculated as follows:

 

Fig2

β = Number of distinct possible failure mechanisms

k= Number of life tests combined

xi = Number of failures for a given mechanism (1 = 1, 2, ... B)

TDHj = Total device hours of test time for life testj (j = 1, 2,... k)

AFij = Acceleration factor for appropriate failure mechanism (i = 1, 2,... k)

M = X2 ( , 2r +2) / 2
(where X2 = chi squre factor for 2r +2 degrees of freedom, r = total number of failures, ∝ = risk associated with CL between 0 and 1)

 


Reliability Data - Environmental
Typical results for all surface mount products

No. Test Item Test Condition Failure Rate
1 High Temp. TA= 150°C, t=1000 Hours 0/77
2 Low Temp. TA= -65°C, t=1000 Hours 0/77
3 Humidity TA = 85°C, RH= 85%, t=1000 Hours 0/77
4 Temperature Cycling (150°C for 15 Min./ 25°C for < 1 min. / -55°C for 15 Min.) x 10 cycles 0/77
5 Thermal Shock Liquid to Liquid  (0°C to 100°C) x 10 cycles 0/77
6 Pressure Cooker TA= 121°C, p= 15 PSIG, t=168 Hours 0/77
7 Solderability T (Solder)= 245°C, t= 5 sec. 0/77
8 Solder Dip Total Immersion, 265°C for 10 sec. 0/77
 

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